Fault-Tolerant Meshes On-Board Satellites and Reconfigurable Meshes on the Ground

Heiko Schröder, School of Computer Engineering, NTU

Abstract

The main task of X-SAT might be to take pictures for environmental research, e.g. looking for forest fires, for oil spills, for changes in settlements and potentially giving storm warnings. The amount of pictures that can be taken exceeds the number of pictures that can be downloaded to our ground station by orders of magnitude. Thus it would increase the value of X-SAT significantly if image analysis can be done on-board – in real-time. The aim of on-board image processing is to sort out images that do not contain useful information, to segment images according to usefulness and to compress those parts that seem to be of little or no value to the users.

State-of-the-art on-board computing is (surprisingly) characterized by the use of very slow, very expensive but space hardened (i.e. resistant to high doses of radiation) processing elements. Our approach is radically different: We aim at using off-the-shelf, low-price, and high-performance components and connect them via a space-hardened fault-tolerant network into a parallel image processing engine. For the implementation of the network one option is to use FPGAs that are particularly resistant towards radiation.

Few types of networks which we currently see as candidates for being imbedded on the FPGAs are given in the talk. There is ongoing research to find optimal networks within a group of researchers of our school and there is strong collaboration with outside researchers.

Getting deeper into the details of this approach made us aware that the same techniques (i.e. using FPGAs for the implementation of interconnection networks) can also be of major advantage for many applications down on earth: Any connection network can be implemented on the FPGA, in particular we can switch from mesh to torus, to hypercube (as long as we run "normal" algorithms), or any network that is appropriate for the application. But of greatest interest seems to be to implement reconfigurable meshes and reconfigurable tori on such an architecture, as these outperform all fixed connection networks in many areas. In the talk a small set of examples from the area of image processing is given in order to illustrate this approach. The approach of interconnecting low-price processing elements into massively parallel systems might also give rise to a new type of supercomputer.